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NVIC line count in the Devicetree; athrill_device_target_node_u32 - #85
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The SoC layers give the NVIC node athrill,num-irqs (F7 110, H7 150, the values the STM32 target hard-coded); the Zephyr DTSI already has arm,num-irq-priority-bits. athrill_device_target_node_u32 lets a target read a property of its own nodes. The Pixhawk README hashes are updated (they were stale before). Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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For hakoniwalab/athrill-target-stm32#62.
What changed
boards/pixhawk4/stm32f765-athrill.dtsiandboards/pixhawk6c/stm32h743-athrill.dtsigive the NVIC nodeathrill,num-irqs: 110 on F7 and 150 on H7, the values the STM32 target hard-coded. Zephyr's DTSI hasarm,num-irq-priority-bitsbut not the line count, which Zephyr takes from Kconfig.athrill_device_target_node_u32(). It reads a 32-bit cell of a property of the first enabled node with a given compatible, so a target can read its own nodes, such as the NVIC. It is a function, not an ops-struct field, so plugins are unaffected.Checks
ctest passes 566/566. The four STM32 gates with the target change (athrill-target-stm32 PR) all match their references:
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