wolfSSL · mattia-moffa · Mar 20, 2026 · Mar 25, 2026 · Mar 26, 2026 · Apr 9, 2026
diff --git a/arch.mk b/arch.mk
@@ -140,7 +140,7 @@ endif
 ## ARM Cortex-M
 ifeq ($(ARCH),ARM)
   CROSS_COMPILE?=arm-none-eabi-
-  CFLAGS+=-DARCH_ARM
+  CFLAGS+=-DARCH_ARM -DFAST_MEMCPY
   CFLAGS+=-mthumb -mlittle-endian
   LDFLAGS+=-mthumb -mlittle-endian
   ifeq ($(USE_GCC),1)
@@ -187,6 +187,52 @@ ifeq ($(ARCH),ARM)
     SPI_TARGET=stm32
   endif
 
+  ifeq ($(TARGET),max32666)
+    ARCH_FLASH_OFFSET=0x10000000
+    ifeq ($(MAX32666_FTHR2),1)
+      CFLAGS+=-DMAX32666_FTHR2
+    endif
+    # MAX3266X TPU hardware SHA256 acceleration (requires MSDK_DIR)
+    ifeq ($(MAX3266X_TPU),1)
+      NO_ARM_ASM=1
+      CFLAGS+=-DMAX3266X_SHA
+      CFLAGS+=-ffunction-sections -fdata-sections
+      ifeq ($(MAX3266X_OLD),1)
+        # Older Maxim SDK tree (flat MAX32665PeriphDriver layout)
+        CFLAGS+=-DWOLFSSL_MAX3266X_OLD
+        MAX3266X_CFLAGS:= \
+          -I$(MSDK_DIR)/Libraries/MAX32665PeriphDriver/Include/ \
+          -I$(MSDK_DIR)/Libraries/CMSIS/Device/Maxim/MAX32665/Include/ \
+          -I$(MSDK_DIR)/Libraries/CMSIS/Include/
+        CFLAGS+=$(MAX3266X_CFLAGS)
+        OBJS+=$(MSDK_DIR)/Libraries/MAX32665PeriphDriver/Source/mxc_sys.o \
+              $(MSDK_DIR)/Libraries/MAX32665PeriphDriver/Source/mxc_delay.o
+      else
+        CFLAGS+=-DWOLFSSL_MAX3266X
+        CFLAGS+=-DTARGET=MAX32665 -DTARGET_REV=0x4131
+        MAX3266X_CFLAGS:= \
+          -I$(MSDK_DIR)/Libraries/PeriphDrivers/Include/MAX32665/ \
+          -I$(MSDK_DIR)/Libraries/CMSIS/Device/Maxim/MAX32665/Include/ \
+          -I$(MSDK_DIR)/Libraries/PeriphDrivers/Source/TPU/ \
+          -I$(MSDK_DIR)/Libraries/PeriphDrivers/Source/SYS/ \
+          -I$(MSDK_DIR)/Libraries/CMSIS/Include/
+        CFLAGS+=$(MAX3266X_CFLAGS)
+        OBJS+=$(MSDK_DIR)/Libraries/PeriphDrivers/Source/TPU/tpu_me14.o \
+              $(MSDK_DIR)/Libraries/PeriphDrivers/Source/TPU/tpu_reva.o \
+              $(MSDK_DIR)/Libraries/PeriphDrivers/Source/SYS/sys_me14.o \
+              $(MSDK_DIR)/Libraries/PeriphDrivers/Source/SYS/mxc_delay.o
+      endif
+      WOLFCRYPT_OBJS+=$(WOLFBOOT_LIB_WOLFSSL)/wolfcrypt/src/port/maxim/max3266x.o
+    endif
+  endif
+
+  # max3266x.c requires WOLFSSL_SP_MATH_ALL for MXC_WORD_SIZE, but only the
+  # MAA math code (MAX3266X_MATH) actually uses it. Add SP_MATH_ALL to just
+  # this object to satisfy the header, without bloating the bootloader.
+  ifeq ($(MAX3266X_TPU),1)
+$(WOLFBOOT_LIB_WOLFSSL)/wolfcrypt/src/port/maxim/max3266x.o: CFLAGS+=-DWOLFSSL_SP_MATH_ALL
+  endif
+
   ifeq ($(TARGET),pic32cz)
     ARCH_FLASH_OFFSET=0x08000000
     CORTEX_M7=1

diff --git a/config/examples/max32666.config b/config/examples/max32666.config
@@ -0,0 +1,19 @@
+ARCH?=ARM
+TARGET?=max32666
+SIGN?=ECC256
+HASH?=SHA256
+VTOR?=1
+NO_ASM?=0
+SPMATH?=1
+RAM_CODE?=1
+NVM_FLASH_WRITEONCE?=1
+NO_MPU?=1
+DEBUG_UART?=1
+MAX3266X_TPU?=1
+MAX3266X_OLD?=0
+MSDK_DIR?=$(PWD)/../msdk
+WOLFBOOT_SECTOR_SIZE?=0x2000
+WOLFBOOT_PARTITION_SIZE?=0x40000
+WOLFBOOT_PARTITION_BOOT_ADDRESS?=0x10008000
+WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x10048000
+WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x10088000
diff --git a/docs/Targets.md b/docs/Targets.md
@@ -5,6 +5,7 @@ This README describes configuration of supported targets.
 ## Supported Targets
 
 * [Simulated](#simulated)
+* [Analog Devices MAX32666](#analog-devices-max32666)
 * [Cortex-A53 / Raspberry PI 3](#cortex-a53--raspberry-pi-3-experimental)
 * [Cypress PSoC-6](#cypress-psoc-6)
 * [Infineon AURIX TC3xx](#infineon-aurix-tc3xx)
@@ -8491,3 +8492,113 @@ Number of public keys: 1
   11 0C FA F6 B5 F9 59 BA B9 A5 8E 34 4A CD C5 83
   7E 43 EF 61 6E C4 15 88 3C FE D6 76 47 D9 82 A4
 ```
+
+## Analog Devices MAX32666
+
+The Analog Devices MAX32665/MAX32666 family features a dual Cortex-M4 at 96 MHz
+with 1MB internal flash (2 x 512KB banks), 560KB SRAM, and BLE 5.
+
+wolfBoot has been tested on the MAX32666FTHR board with a MAX32625PICO debug adapter,
+as well as the MAX32666FTHR2 board with the onboard debugger.
+
+**Key Features:**
+- ARM Cortex-M4 core at 96 MHz (HIRC96M oscillator)
+- 1MB Flash: 8KB page erase, 128-bit (16-byte) write unit, dual-bank (FLC0/FLC1)
+- 560KB SRAM
+- Bare-metal implementation (no MSDK required for boot)
+- UART0 debug output:
+  - P1.13 TX, P1.12 RX on FTHR board
+  - P0.9 TX, P0.10 RX on FTHR2 board
+
+### MAX32666: Memory Layout
+
+Internal-flash-only layout (default):
+
+| Region | Address Range | Size |
+|--------|---------------|------|
+| Bootloader | 0x10000000 - 0x10007FFF | 32 KB |
+| Boot Partition | 0x10008000 - 0x10047FFF | 256 KB |
+| Update Partition | 0x10048000 - 0x10087FFF | 256 KB |
+| Swap Sector | 0x10088000 - 0x10089FFF | 8 KB |
+
+### MAX32666: Building
+
+```sh
+cp config/examples/max32666.config .config
+make clean
+make keysclean
+make
+```
+
+Expected wolfBoot size: ~25KB (ECC256 + SHA256 with Cortex-M4 ASM).
+
+### MAX32666: Flashing
+
+The MAX32666FTHR board uses an external MAX32625PICO debug adapter (CMSIS-DAP).
+An OpenOCD target config is provided at `tools/openocd/max32665.cfg`.
+
+**Important:** If multiple CMSIS-DAP probes are connected, specify the PICO's
+serial number with `cmsis_dap_serial`. Find it with:
+`ls /dev/serial/by-id/ | grep DAPLink`
+
+```sh
+# Flash the factory image (wolfBoot + signed test-app)
+openocd -f interface/cmsis-dap.cfg \
+    -c "cmsis_dap_serial <your-pico-serial>" \
+    -f tools/openocd/max32665.cfg \
+    -c "adapter speed 1000" \
+    -c "program factory.bin 0x10000000 verify reset exit"
+```
+
+### MAX32666: UART Console
+
+The FTHR board routes UART1 (P1.12 RX, P1.13 TX) through the PICO adapter's
+CDC serial interface. The serial port appears as the DAPLink's `-if01` interface:
+
+```sh
+# Find the serial port
+ls /dev/serial/by-id/ | grep DAPLink
+
+# Connect (typically /dev/ttyACMx)
+minicom -D /dev/ttyACM2 -b 115200
+# or
+screen /dev/serial/by-id/usb-ARM_DAPLink_CMSIS-DAP_*-if01 115200
+```
+
+Expected output on first boot:
+
+```
+wolfBoot Version: X.Y.Z (date time)
+```
+
+Followed by the test application:
+
+```
+MAX32666 Test App v1
+Boot success marked. Version: 1
+```
+
+### MAX32666: Configuration Options
+
+| Option | Description |
+|--------|-------------|
+| `NVM_FLASH_WRITEONCE` | **Required.** Flash can only be written once between erases. |
+| `RAM_CODE` | **Required.** Run flash erase/write from RAM (executing from same flash). |
+| `DEBUG_UART` | Enable UART0 debug output (115200 baud, 8N1). |
+| `EXT_FLASH` | Enable external flash support (for QSPI NAND configuration). |
+| `FLAGS_HOME` | Keep boot flags in internal flash (required when `EXT_FLASH=1`). |
+| `MAX3266X_TPU` | Enable TPU hardware SHA256 acceleration (requires `MSDK_DIR`). |
+| `MAX3266X_OLD` | Build TPU acceleration against the older, deprecated Maxim SDK tree instead of the modern MSDK. |
+
+### MAX32666: External QSPI NAND Configuration
+
+A separate configuration is provided for external QSPI NAND flash (Micron
+MT29F8G01ADBFD12) as firmware update storage:
+
+```sh
+cp config/examples/max32666-nand.config .config
+make clean
+make
+```
+
+See [config/examples/max32666-nand.config](/config/examples/max32666-nand.config) for details.