Sync with upstream to align encoding.h - #46
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This adds byte/halfword lr.b/h and sc.b/h encodings similar to Zabha. Specification: riscv/riscv-isa-manual#3234
* Add MCAUSE/SCAUSE/UCAUSE Interrupt and Exception Code field masks Define MCAUSE32/64_INT and MCAUSE32/64_EXCCODE for the Interrupt and Exception Code fields of mcause, plus XLEN-generic aliases in the __riscv_xlen selection block, following the same pattern used for MSTATUS_SD and SATP_MODE. scause and ucause share the identical bit layout per the privileged spec, so SCAUSE_* and UCAUSE_* are defined as aliases of the MCAUSE_* masks. * Remove UCAUSE macros There is no ucause CSR in the privileged spec, so the UCAUSE32/64_INT and UCAUSE32/64_EXCCODE masks (and the UCAUSE_INT/UCAUSE_EXCCODE xlen-generic aliases) don't apply. Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com> --------- Co-authored-by: Claude Sonnet 5 <noreply@anthropic.com>
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MCAUSE_INTERRUPTmacro superseded byxCAUSE_INTmacros